PROWESS

Processor Reconfiguration for Wideband Spectrum Sensing

About PROWESS

Our team is embarking on a new project titled "Dynamic Runtime Domain-Focused Software-Reconfigurable Heterogeneous (DR-DASH) Processor" funded by the DARPA Processor Reconfiguration for Wideband Sensor Systems (PROWESS) program in collaboration with researchers from Arizona State University, the University of Wisconsin, and the University of Michigan.

The team's central objective is to design and develop a highly adaptable heterogeneous System-on-Chip (SoC) and an integrated intelligent runtime manager to fulfill the vision of dynamic deployment for spectrum sensing pipelines and their associated downstream decision-making applications. This ambitious initiative is expected to yield substantial advantages, including lightning-fast task switching within a mere 50 nanoseconds, real-time scheduling capabilities for up to 100 concurrent programs, processor utilization levels exceeding 90%, and an extraordinary 40-fold enhancement in spectral scanning performance compared to traditional approaches.

Our lab specializes in the design and development of embedded software ecosystems for reconfigurable, domain-specific, and unconventional computing architectures. Within the framework of the DR-DASH program, we will take the leadership of the real-time software team. We have already laid the groundwork to tackle the PROWESS program challenges through two ongoing projects funded by DARPA's Domain Specific System on Chip (DSSoC) and Space-Based Adaptive Communications Node (Space-BACN) programs. Within the scope of these two programs, we have taken the lead in developing a runtime system known as CEDR, which stands for Compile Integrated Domain Specific System on Chip Runtime. Our approach, as depicted in the figure below, is purposefully engineered to remove the necessity for users to possess an intricate knowledge of the underlying hardware. This achievement signifies a significant step towards enabling a broader audience to leverage the capabilities of heterogeneous computing systems, all without the hindrance of hardware complexity.



Fig.1: Hardware agnostic application development, automated code transformation and
deployment on the target heterogenous SoC composed of pool of general-purpose processors and accelerators.


DR-DASH aims to elevate these capabilities to a level beyond what can be achieved with conventional computing methods available today. The team will achieve this by revealing innovative architectural trade-offs that collectively provide a high level of computational density, rapid program switching, and real-time reconfiguration. These enhancements will be crucial in improving the performance of tactical RF sensors operating in crowded spectrum environments, particularly when dealing with new incoming signals.